Benjamin Trost / hardware and embedded

Benjamin Trost

I'm an electrical engineering student at McGill, class of 2028. Most of what I know came out of McGill Formula Electric, where I design the low-voltage and safety boards for the car: the brake plausibility device, the LV battery monitor, the light drivers, and then debug them when they fail at competition. Last summer at Orbis Labs I wrote cellular firmware for a radar flood gauge and laid out a four-charger evaluation board. What keeps me in hardware is that the schematic, the layout, and the firmware all have to agree before anything works.

Montreal, QC US citizen Open to summer 2027 internships
115.0
62.0
Board
LVBMS
Layers
4
Parts
249
Status
Fab pending

Experience

Two years of vehicle electronics, one summer of embedded product work.

May 2026 – August 2026

Electrical Engineering Intern

Orbis Labs
  • Designed a 150 × 101 mm two-layer battery-charger evaluation board in KiCad to benchmark LTO against LFP cell chemistry in cold-chamber testing, with four charger ICs, a diode-OR input stage, jumper-selectable source and charger paths, and a discharge path into an electronic load.
  • Developed bare-metal cellular firmware in C on an STM32G491 with a SIM7080G modem, building a driver-level state machine for module init, AT-command control, and state transitions with DMA ring-buffer RX and FreeRTOS queue-based tasking.
  • Integrated an mbedTLS DTLS 1.2 PSK client with Connection ID support, enabling secure UDP telemetry for a radar-based flood gauge with a flash-persisted session context that survives power loss and modem restarts.
  • Optimized product BOM through schematic analysis and component sourcing, identifying cost-effective microcontrollers, LTE modems, and USB connectors.
  • Configured and debugged custom BMS hardware in TI BQStudio, overriding protective FETs to wake fuel gauge boards.
  • Architected LabVIEW DAQ testbenches and GUIs to validate prototype power and accumulator metrics from accelerometer serial data.
September 2024 – September 2026

PCB Project Lead, Harnessing and DAQ Sub-lead

McGill Formula Electric
PCB Project Lead
  • Lead design, layout, and review of PCBs critical to the vehicle's low-voltage and safety systems: BSPD, LVBMS, TSIL/RTM driver boards, and lighting modules.
  • Redesigned brakelight and RTM boards to a low-side switch architecture and moved to aluminum-core PCBs for thermal management.
  • Spearheaded an LVBMS chip-architecture switch, migrating communication from UART to SPI for modularity.
  • Mentor new members in Altium Designer schematic capture and layout, and set team-wide design standards.
Harnessing and DAQ Sub-lead
  • Co-led design, fabrication, and testing of 8 custom harnesses, 500+ wires, to IPC/WHMA-A-620 standards at a 0.2% error rate.
  • Ran 3 rounds of hardware-in-the-loop integration testing via Hi-Pot and continuity checks, with signal integrity and latency analysis on the vehicle CAN architecture using a DSO.
  • Manufactured a 12S3P LiPo low-voltage pack by spot-welding, integrating monitoring lines directly to the LVBMS.
  • Cut total harness subsystem weight 25% through revamped trade studies and manufacturing methodology.
Summer 2022

Research Intern

Zon Lab
  • Conducted zebrafish research on sickle-cell anemia, injecting embryos with experimental treatments and monitoring GFP fluorescence to assess genetic responses.
  • Presented findings to an audience of 20+ doctors, researchers, and technicians.

Boards

Renders come from the layout files. Four have a working simulator built from the real circuit.

Charger evaluation board, top view

Charger evaluation board

Orbis Labs, summer 2026

A test fixture for choosing the battery in the flood gauge. Solar, USB, and a bench supply come in at the left. The solar leg drops through a TPS62125 buck, then an LM66200 dual ideal diode passes whichever input is highest and calls it Vsys. Jumpers route Vsys to one of four charger ICs, and whichever one is jumpered in charges the cell. The cell breaks out to an electronic load, so the same cell can be charged and discharged at temperature to compare LTO against LFP.

150 × 101 mm2 layer189 parts106 nets
Fabricated, bring-up complete

Input sources

5.6V
5.0V
12.0V
SOLARUSBBENCH ›LM66200 ›VSYS 0.00V

Charger slot

Cell under test

0.00A
0.00V
CC CV Charge done Insufficient headroom

The diode-OR passes whichever input sits highest, so the bench supply overrides solar the moment you enable it. Headroom is what separates the slots: the linear parts need Vsys above the cell target plus their dropout, while the buck-boost parts keep charging off a sagging panel. Pull more from the e-load than the charger can source and the cell drains no matter what the input is doing.

LVBMS printed circuit board, top view

LVBMS

McGill Formula Electric

Low-voltage monitoring system for the LV battery, giving the LV pack the same visibility the rules require of the HV accumulator. Monitors per-cell voltage and temperature across the 12S3P pack with RC-filtered NTC taps off VREF1, and pack current through a hall-effect sensor. Passive balancing bleeds every cell down to the lowest cell's potential. Talks SPI to an STM32, which puts telemetry on critical CAN through a transceiver, and Q2 gives the MCU a software battery disconnect. Power tree runs 30V pack to 24V through a switching regulator with UVLO, then 5V, then 3.3V.

115 × 62 mm4 layer249 parts159 nets
Design complete, fab pending

Pack monitor, drag the cell voltages

Pack 0.00V I_pack 0.0A
Car bus

Passive balancing runs live: every cell above the lowest bleeds down to its potential. Drag a cell up and watch it come back. The lowest cell is marked green.

BSPD printed circuit board, top view

BSPD

McGill Formula Electric, safety critical

Brake system plausibility device: the rules-mandated, non-programmable circuit that shuts the car down when brake and throttle are pressed together. Open-collector comparators give active-low fault logic in three classes: power fault above 4.8V, ground fault below 0.2V, and plausibility fault when brake and current are both past their references. Any fault held longer than 500 ms charges the RC delay past 3.25V and fires BSPD_SD. Thresholds live on 10k pots, retuned yearly without rework.

55 × 37 mm2 layer93 partsAnalog only
On the car

Sensor inputs

0.50V
0.50V

Reference pots, 10k

1.25V
2.00V
0.70V

Fault logic, active low

PWR_FLT GND_FLT PLAUS_FLT U6 NAND

500 ms delay to shutdown

0.00V
BSPD_SD latched Brakelight drain

The brakelight drain fires on its own window comparator, above BRAKE_LOW_REF and below the 4.8V rail, independent of the fault tree. The red line on the cap bar is the 3.25V trip. Clear the fault before the cap gets there and it discharges; hold it 500 ms and the car is done until power cycle.

TSIL driver printed circuit board, top view

TSIL driver

McGill Formula Electric

Drives the tractive-system indicator lights. BMS_SIG and IMD_SIG are active-low faults into a NOR gate: either one sets FLT high, opening the N-channel FET and gating a 555-derived LIGHT_CLOCK through AND gates to flash red. With no fault, FLT sits low, Q2 drives Q3, and the bar holds static green. HV_ON_SIG passes straight through as RTML_OUT to the ready-to-move light.

41 × 21 mm2 layer35 parts555 timer
On the car

Fault inputs, active low

TSIL output

FLT LIGHT_CLOCK RTML_OUT to RTM

Steady green means the system is nominal. Either fault going low drives the NOR high and puts the bar on the 555 clock in red.

TSIL and RTM light bars

McGill Formula Electric

The lights themselves, on aluminum-core PCB. Routed entirely single-sided with zero vias, since metal-core boards cannot take plated through-holes cheaply, with traces sized for continuous LED current. TSIL carries two LED sets: green whenever the car is healthy, red flashed by the driver's 555 on a BMS or IMD fault. RTM flashes on the driver's ready-to-move signal.

68 + 73 mm bars1 layer Al-core0 vias
On the car
Triangular brakelight board

Brakelight

McGill Formula Electric

The red triangle at the back of the car: 36 LEDs in six strings behind a resettable PTC fuse, lit by the BSPD's low-side Brake_Light_Drain. All the logic lives upstream on the BSPD, so this board is an LED matrix, a fuse, and copper. It mounts where the car sees the most vibration and weather, which is the argument for keeping it that simple.

Triangular36 LEDs6 stringsPTC fused
On the car

Skills

EDA and software

  • Altium Designer
  • KiCad
  • LTSpice
  • RapidHarness
  • TI BQStudio
  • LabVIEW
  • Embedded C, STM32 HAL
  • FreeRTOS, mbedTLS
  • Python, Linux, Git

Protocols

  • CAN bus
  • SPI, I2C, UART
  • BLE
  • DTLS 1.2 over UDP
  • IPC/WHMA-A-620

Hardware and lab

  • PCB design and layout
  • DSO, signal integrity
  • Harness fabrication
  • Precision soldering
  • Spot welding
  • Hi-Pot testing